社会招聘-pg电子体验试玩网址

job highlights
1.analog/mixed-signal module design and integration
2.3 years hands on experience
3.attractive staff benefits, bonus, share option
job description
key tasks / responsibilities
1.detailed design and simulation of high accuracy analogue/mixed signal ic blocks like references, amplifiers, filters, dac/adc, power management, synthesizers building blocks etc. -- as well as the higher-level integration of these blocks
2.full involvement in circuit design flow from definition and specification to production/ip delivery
3.top level ic/soc analogue/mixed-signal performance and functional verification
4.supervision of circuit physical implementation
5.involvement with system design and modelling
6.involvement in silicon evaluation and test
7.working with a multi-disciplined soc design team: including digital, software, production, test and application engineers

key skills / background
1.good bachelor’s degree in electronic engineering or related discipline, relevant analogue/mixed-signal ic design msc or phd preferred
2.experience in analogue/mixed signal schematic design in cmos
＞ 3 years of design experience in analogue/mixed signal circuits, specifically in one or more of the following areas:
data converters
synthesizer building blocks and oscillators
filters and amplifiers
power management building blocks in low voltage deep submicron cmos: dc-dc convertors, regulators, references etc
3.experience in custom ic layout and physical implementation
4.experienced in cad tools:
cadence virtuoso platform: spectre/spectrerf/ams simulation, layout xl etc
mentor calibre physical verification tools: drc/lvs/pex etc
5.hands on knowledge of analogue/mixed signal ic evaluation and test
6.up to date on ams ic design techniques and methodologies
beneficial skills
1.knowledge or experience in analogue/mixed signal ip delivery, dsp, cmos process, production test
2.experience in io and esd/emc design
3.experience in rfic design in silicon technologies

job highlights
1.soc system design and integration, team management
2.5 years experience on digital ic design
3.attractive staff benefits, bonus, share options
job description
1.key tasks / responsibilities
2.take high level requirements and write chip or block level micro-architecture specifications.
3.ability to undertake die-sizing, power estimation, technology selection etc to define an optimal solution for a given ic development.
4.strong hands-on experience in rtl coding of modules, sub-system or full-chip (primarily verilog or systemverilog)
5.selection and integration of 3rd party ip into a soc design
6.ability to lead a digital team on a soc project – mentoring and reviewing the work of colleagues and ensuring that code quality is at the highest level and consistent with coding guidelines and applicable quality processes.
7.chip level integration and liaising with implementation and physical design staff to ensure that the rtl code is optimized and aligned with the requirements of the back-end team.

key skills / background
1.ph.d or master in electronic engineering, computer science or related discipline.
2.5 year experience as a digital designer or digital lead in a number design of soc developments.
3.a good understanding of the complete soc flow from specification through to tape-out, validation and test.
4.experience in system integration of main stream cpu cores, like arm cortex-m0, cortex-m0 etc.
5.good working knowledge of verification techniques and methodologies and proven ability to debug issues in a structured and timely way.
6.low power design expertise
beneficial skills
1.good knowledge of dft techniques and the impact on the rtl design
2.analog design knowledge or experience of working on mixed-signal soc developments.
3.extensive knowledge of verification methodologies particularly uvm and systemverilog.
4.experience in the planning and implementation of verification infrastructures, test benches, models, assertions and functional tests in verilog and systemverilog.
6.experience of fpga design and associated tools

1.function block and system specification design；
2.rtl coding, design verification, logic synthesis, dft and static timing analysis
3.system integration based on cortex-m or risc-v cpu core

1.bachelor degree in electronic engineering or equivalent；
2.knowledge in asic/fpga design methodology；
3.experience in one or more of the following areas is advantage；
4.verilog based logic design, verification and synthesis；
5.knowledge of low power logic design；
6.knowledge of digital signal processing algorithm and its implementation
7.dft, bist, scan insertion, atpg